// ---- Created with 3Dmigoto v1.3.15 on Thu Dec 08 20:11:55 2022
Texture2D<float4> t0 : register(t0);

SamplerState s0_s : register(s0);

cbuffer cb0 : register(b0)
{
  float4 cb0[5];
}




// 3Dmigoto declarations
#define cmp -
Texture1D<float4> IniParams : register(t120);
Texture2D<float4> StereoParams : register(t125);


void main(
  float4 v0 : SV_POSITION0,
  float4 v1 : COLOR0,
  float4 v2 : TEXCOORD0,
  float4 v3 : TEXCOORD1,
  float4 v4 : TEXCOORD2,
  out float4 o0 : SV_Target0)
{
  float4 r0,r1;
  uint4 bitmask, uiDest;
  float4 fDest;

  float4 params = IniParams.Load(0);
  if (params.x == 0)
  {
   o0 = 0;
   return;
  } else {

  r0.xy = cb0[4].zw + -cb0[4].xy;
  r0.xy = -abs(v4.xy) + r0.xy;
  r0.xy = saturate(v4.zw * r0.xy);
  r0.x = r0.x * r0.y;
  r1.xyzw = t0.Sample(s0_s, v2.xy).xyzw;
  r1.xyzw = cb0[3].xyzw + r1.xyzw;
  r1.xyzw = v1.xyzw * r1.xyzw;
  r0.x = r1.w * r0.x;
  o0.xyz = r1.xyz * r0.xxx;
  o0.w = r0.x;
  return;
  }
}

/*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//   using 3Dmigoto v1.3.15 on Thu Dec 08 20:11:55 2022
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION              0   xyzw        0      POS   float
// COLOR                    0   xyzw        1     NONE   float   xyzw
// TEXCOORD                 0   xy          2     NONE   float   xy
// TEXCOORD                 1   xyzw        3     NONE   float
// TEXCOORD                 2   xyzw        4     NONE   float   xyzw
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_Target                0   xyzw        0   TARGET   float   xyzw
//
ps_4_0
dcl_constantbuffer cb0[5], immediateIndexed
dcl_sampler s0, mode_default
dcl_resource_texture2d (float,float,float,float) t0
dcl_input_ps linear v1.xyzw
dcl_input_ps linear v2.xy
dcl_input_ps linear v4.xyzw
dcl_output o0.xyzw
dcl_temps 2
add r0.xy, -cb0[4].xyxx, cb0[4].zwzz
add r0.xy, r0.xyxx, -|v4.xyxx|
mul_sat r0.xy, r0.xyxx, v4.zwzz
mul r0.x, r0.y, r0.x
sample r1.xyzw, v2.xyxx, t0.xyzw, s0
add r1.xyzw, r1.xyzw, cb0[3].xyzw
mul r1.xyzw, r1.xyzw, v1.xyzw
mul r0.x, r0.x, r1.w
mul o0.xyz, r0.xxxx, r1.xyzx
mov o0.w, r0.x
ret
// Approximately 0 instruction slots used

//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/
